Non-volatile memory (“NVM”) refers to semiconductor memory which is able to continually store information even when the supply of electricity is removed from the device containing the NVM cell. NVM includes Mask Read-Only Memory (Mask ROM), Programmable Read-Only Memory (PROM), Erasable Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM), and Flash Memory. Non-volatile memory is extensively used in the semiconductor industry and is a class of memory developed to prevent loss of programmed data. Typically, non-volatile memory can be programmed, read and/or erased based on the device's end-use requirements, and the programmed data can be stored for a long period of time.
A flash memory device generally includes an array of memory cells arranged in rows and columns. Each memory cell includes a MOS transistor structure having a gate, a drain, a source, and a channel defined between the drain and the source. The gate corresponds to a word line, and the drain or source corresponds to a bit line of the memory array. The gate of a conventional flash memory cell is generally a dual-gate structure, including a control gate and a floating gate, wherein the floating gate is sandwiched between two dielectric layers to trap carriers such as electrons, to “program” the cell. In other words, in a conventional cell, a first dielectric layer is formed over the channel, the floating gate is formed over the first dielectric layer, a second dielectric layer is formed over the floating gate, and the control gate is finally formed over the second dielectric layer.
During programming, a set of programming biases are applied to selected word lines and bit lines. One or more memory cells corresponding to the selected word lines and bit lines are biased in the programming state. For a single memory cell, different biases applied to the source and drain thereof create an electric field along the channel thereof, through which electrons gain enough energy to tunnel through the first dielectric layer into the floating gate and become stored therein. As a result of the stored electrons in the floating gate, the threshold voltage of the memory cell is modified. The changing of the threshold voltage determines whether the memory cell is programmed.
To read a memory cell, reading biases are applied and a sensing device reads a current passing through the memory cell. If a memory cell is programmed, or has electrons stored in its floating gate, its current level is different from those memory cells which are not programmed. Therefore, based on the measured current level, the sensing device is capable of determining the state of each memory cell.
To erase the information stored in a flash memory cell, erasing biases are applied thereto to force the stored electrons to funnel out the floating gate, through a known mechanism referred to as Fowler-Nordheim (F-N) tunneling.
However, certain problems are associated with conventional flash memory, such as, for example, high power consumption and program and read disturbances. High power consumption is due to high program and erasure voltages required to induce electron tunneling for program and erase operations. Program and read disturbances relate to current leakage occurring at non-selected neighboring memory cells.
A disturbance occurs when one selected cell in the memory array is being read or programmed and another non-selected programmed memory cell sharing the same word line or bit line experiences current leakage caused by electron tunneling of the selected cell. A loss of electrons stored in the floating gate of the non-selected memory cell may result in a change of status from “programmed” to “erased”. The read disturbance is further explained with reference to FIG. 1, which shows a flash memory array comprising conventional floating gate memory cells.
Thus there is a need in the art for memory cell designs and devices containing arrays of such memory cells which can be operated via methods which avoid the aforementioned problems.